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this is information on a product in full production. novemb er 2 013 docid49 97 rev 15 1/33 m93c86-x m93c76-x m93c66-x m93c56-x M93C46-X 16-kbit, 8-kbit, 4-kbit, 2-kbit and 1-kbit (8-bit or 16-bit wide) mi crowire serial access eeprom datasheet - production data features ? in d u s t ry st an da rd m i c r o w ire bu s ? sing le su pp ly voltag e: ? 2 .5 v to 5. 5 v for m93cx6-w ? 1 .8 v to 5. 5 v for m93cx6-r ? dual o r ga nization : b y wor d (x16 ) or b y te ( x 8) ? pro g r a mmi ng instru ction s that work on: by te, wor d or e n tire m e mo ry ? self-timed programming c ycle wit h auto-erase: 5 ms ? ready/busy sig n a l du rin g pr og r a m m i ng ? 2 mhz cloc k rat e ? seq uen ti al re ad op er ation ? enh ance d esd/latch-u p be havio r ? more than 4 million w r ite c ycles ? mo re tha n 20 0-ye ar da ta re te ntion ? package s ? s o8, tssop8, ufdfpn8 p a ckages: rohs-compliant and h a logen-free (ecop a ck?) ? p dip8 p a ckage : ? rohs-compliant (ecop a c k 1?) pdip8 (b n) so8 (mn) 150 mil width tssop8 (dw) 169 mil width ufdfpn8 (mc) 2 x 3 mm t a b l e 1 . de vi ce s u m m ary re fe rence part nu mbe r memory size supply vo lt ag e m93c4 6 -x m93c4 6 -w 1 kbit 2.5 v to 5.5 v m93c4 6 -r 1.8 v to 5.5 v m93c5 6 -x m93c5 6 -w 2 kbit 2.5 v to 5.5 v m93c5 6 -r 1.8 v to 5.5 v m93c6 6 -x m93c6 6 -w 4 kbit 2.5 v to 5.5 v m93c6 6 -r 1.8 v to 5.5 v - m 93c7 6 -r 8 kbit 1.8 v to 5.5 v m93c8 6 -x m93c8 6 -w 16 kb it 2.5 v to 5.5 v m93c8 6 -r 1.8 v to 5.5 v www.st.com http://
contents m93c86-x m93c76-r m93c66-x m93c56-x M93C46-X 2/33 docid4997 rev 15 contents 1 d esc ription . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 c onn ecting to the serial b u s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 o perating features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3. 1 s upply vo lt age (v cc ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.1.1 o p e r a ting sup p ly vo lt age ( v cc ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.1.2 p ower-up condit ions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.1.3 p ower-up and device reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.1.4 p ower-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4 m emory organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 i nst r uctions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1 5. 1 r e ad dat a from me mory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5. 2 e rase a nd w r ite d a t a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.2.1 w rite enable and w r ite dis able . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.2.2 w rite . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.2.3 w rite all . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.2.4 e ras e b yte or w o rd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.2.5 e ras e a ll . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6r e a d y / b u s y st atus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7 i nitial d e livery st ate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 8 c lock pulse counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 9 m ax imum rating s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 10 dc and ac p a rameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 1 1 package mechanical dat a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 12 part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
docid4997 rev 15 3/33 m9 3c86 -x m9 3c76 -r m93 c 6 6 - x m93 c 5 6 - x m93 c 46- x c on te nts 3 13 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
list of tables m93c86-x m93c76-r m93c66-x m93c56-x M93C46-X 4/33 docid4997 rev 15 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. memory size vers us organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 3. signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 4. instruc t ion set for the m93c46 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 5. instruc t ion set for the m93c56 and m93c66 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 6. instruc t ion set for the m93c76 and m93c86 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 7. abs o lute maximum rat i ngs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 table 8. operating conditions (m93c x6-w) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 9. operating conditions (m93c x 6-r) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 0 table 10. c yc ling performanc e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 t a b l e 11 . m em o r y ce ll da ta r e t e n t io n . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 12. a c meas urement condit ions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 13. i nput and output capac i tance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 14. dc charac terist ic s (m93cx6-w, device grade 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 15. dc charac terist ic s (m93cx6-r) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 ta ble 1 6 . a c ch ar acte ristics (m 93cx6- w , m93 c x6 -r, d e vice grade 6) . . . . . . . . . . . . . . . . . . . . . . . 23 table 17. a c c h aract e ristic s (m93cx6-r ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 ta ble 1 8 . p dip8 ? 8 lead p l astic du al in-line package, 300 mils body width, ? pack age mechanic al data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 ta ble 1 9 . s o8 nar ro w ? 8 le ad p l astic small ou tlin e, 1 5 0 m ils bo dy wid t h , ? pack age data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 t a b l e 20 . u f d f p n8 8 - le ad u l tra t h in f i n e pitc h du al f l a t p a ck ag e no le ad ? 2 x 3 mm, data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 ta ble 2 1 . t ssop8 ? 8- lead thi n shrin k small ou tline, pa ckage mechanical dat a . . . . . . . . . . . . . . . . 29 table 22. o rdering informat ion s cheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 table 23. d ocument rev i sion hist ory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
docid4997 rev 15 5/33 m9 3c86 -x m9 3c76 -r m93 c 6 6 - x m93 c 5 6 - x m93 c 46- x l ist of f i g u res 5 list of figures figure 1. logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 fig u r e 2. 8 - p i n packag e co nne ctio ns ( t op view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 3. bus mas t er and memory devices on the serial bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 4. m93cx6 o rg input c o nnec t ion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 5. read , wr ite, w e n, wd s sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 6. wral s e quence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 7. erase, era l sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 f i gu re 8 . writ e se qu en ce w i th on e clo ck g lit ch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 9. ac t e s t ing input out p ut w a v e forms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 fig u r e 10 . s ynchr o n ous tim i ng ( s ta rt and o p - c o d e in put) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 fig u r e 11 . s ynchr o n ous tim i ng ( r e a d ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 f i gu re 1 2 . s yn ch ro no u s t i min g (w rite ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 fig u r e 13 . p dip8 ? 8 lead p l astic du al in-line package, 300 mils body width, ? pack age outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 fig u r e 14 . s o8 nar ro w ? 8 le ad p l astic small ou tlin e, 1 5 0 m ils bo dy wid t h , ? pack age outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 fig u r e 15 . u fdfpn8 8- lea d ultr a th in fine p i tch dua l flat pa cka ge no lea d ? 2 x 3 mm, outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 fig u r e 16. t ssop8 ? 8 lea d thin sh rin k smal l o u tline, pa ck age out line . . . . . . . . . . . . . . . . . . . . . . . 29
description m93c86-x m93c76-r m93c66-x m93c56-x M93C46-X 6/33 docid4997 rev 15 1 description the m93c46 (1 kbit), m93c56 (2 kbit), m93c66 (4 kbit), m93c76 (8 kbit) and m93c86 (16 kbit) are electrica lly erasable programmable memo ry (eeprom) de vices accessed through the microwire bus protocol. the memory array can be configured either in bytes (x8b) or in words (x16b). the m93cx6-w devices operate within a voltage supply range from 2.5 v to 5.5 v and the m93cx6-r devices operate within a voltage supply range from 1.8 v to 5.5 v. all these devices operate with a clock frequency of 2 mhz ( o r le ss) , ove r an a m bie n t tem per atur e range of -40 c / +85 c. fig u re 1 . log ic d i a g ram t a ble 2. memor y size ver sus or ganizat i o n de v i c e nu mb e r of bit s nu mbe r of 8 - bi t b y te s n umb e r of 16 -b it w o rd s m93c8 6 163 84 204 8 102 4 m93c7 6 8192 102 4 5 12 m93c6 6 4096 5 1 2 2 56 m93c5 6 2048 2 5 6 1 28 m93c4 6 1024 1 2 8 6 4 t a ble 3. sig n al names si gn al n a me f unc ti on di re c t io n s c hip sele ct input d s e r i a l dat a inp u t i nput q s er ia l d a t a o u t p ut o ut pu t c s e r i a l clo ck input org o rgan ization sel e ct input v cc su pply volt ag e v ss groun d ai01928 d v cc m93cx6 v ss c q s org
docid4997 rev 15 7/33 m9 3c86 -x m9 3c76 -r m93 c 6 6 - x m93 c 5 6 - x m93 c 46- x d es cript i on 32 figur e 2. 8 - p i n p a c k a g e con n ec tions ( t o p view) 1. see section 11: package me chan ical d ata for pa ckage dimensions, and how to identify p i n- 1. 2. du = d on?t u s e. t he du (do not use) pin does not co ntribute to the normal oper ation o f the device. it is reser v ed for use by st microelectronics du ring test sequences. the p i n ma y b e lef t unconnected or may be connected to v cc or v ss . v ss q org du c sv cc d ai01929b m93cx6 1 2 3 4 8 7 6 5
connecting to the serial bus m93c86-x m93c76-r m93c66-x m93c56-x M93C46-X 8/33 docid4997 rev 15 2 connecting to the serial bus figure 3 shows an example of three memory devices connected to an mcu, on a serial bus. only one device is selected at a time, so only one device drives the serial data output (q) line at a time, the other devices are high impedance. the pull-down resistor r (represented in figure 3 ) ensures that no device is selected if the bus master leaves the s line in the high impedance state. in ap plication s whe r e the b u s master ma y b e in a st ate wh er e all inp u t s /o utpu t s ar e hig h imp e d ance at th e same time ( f o r e x amp l e, if the bu s m a ste r is r e set du rin g the tr ansmission of an inst ruction), the clock line (c ) must be co nn ecte d to an exter nal p u ll- down r e sistor so tha t , if all inp u t s /outpu t s becom e hig h imp eda nc e, the c line is pulled low (w hile the s line is p u lled l o w): th is en su re s tha t c d o e s no t be come h i gh at the same time a s s go es lo w , an d so, that the t slch requirement is met. the typical value of r is 100 k ? . figure 3. bus master and memory devices on the serial bus ai14377b bus master m93xxx memory device sdo sdi sck cqd s m93xxx memory device cqd s m93xxx memory device cqd s cs3 cs2 cs1 org org org rr r v cc v cc v cc v cc v ss v ss v ss v ss r
docid4997 rev 15 9/33 m9 3c86 -x m9 3c76 -r m93 c 6 6 - x m93 c 5 6 - x m93 c 46- x o pe rat i ng fe at ures 32 3 operating features 3.1 supply volt age (v cc ) 3.1.1 operating supply voltage (v cc ) prior to selecting the memory and issuing instructions to it, a valid and stable v cc voltage within the specified [v cc (min), v cc (max)] range must be applied. in order to secure a stable dc supply voltage, it is recommended to decouple the v cc line with a suit able cap a citor (usually of the order of 10 nf to 100 nf) close to the v cc /v ss package pins. this v o lt age must remain s t able and valid unt il the en d o f th e tr ansmission of the instr u ction and, for a write instructio n, until the completion of the internal write cycle (t w ). 3.1.2 power-up conditions when the power supply is turned on, v cc rises from v ss to v cc . during this time, the chip select (s) line is not allowed to float and should be driven to v ss , it is th er efor e recommended to connect the s line to v ss via a suitable pull-down resistor. the v cc rise time must not vary faster than 1 v/s. 3.1.3 power-up and device reset in order to prevent inadvertent write operations during power-up, a power on reset (por) circuit is included. at power-up (continuous rise of v cc ), the device does not respond to any instruction until v cc has reached the power on reset threshold voltage (this threshold is lower than the minimum v cc operating voltage defined in operating conditions, in section 10: dc and ac parameters ). when v cc passes the por threshold, the device is reset and is in the following state: ? s t an dby power m ode ? de se lected ( a ssu m ing tha t the r e is a pu ll-do wn re sistor o n th e s li ne) 3.1.4 power-down at power-down (continuous decrease in v cc ), as soon as v cc dr op s fro m th e no rma l o per ating vo lt age to b e low th e po we r on r e set th re sh old volt a g e , the d e vice stop s responding to any inst ruction sent to it. during power-down, the device must be deselected and in the standby power mode (that is, there should be no internal write cycle in progress).
memory organization m93c86-x m93c76-r m93c66-x m93c56-x M93C46-X 10/33 docid4997 rev 15 4 memory organization the m93cx6 memory is organized either as bytes (x8) or as words (x16). if organization select (org) is le ft unconnected (or connected to v cc ) the x16 organization is selected; when organization select (org) is connected to ground (v ss ) the x8 organization is selected. when the m93cx6 is in standby mo de, organization select (org) should be set either to v ss or v cc to r e a c h th e device mini mum po wer con s u m ption ( a s an y volt ag e between v ss and v cc applied to org input may increase the device standby current). figure 4. m93cx6 org input connection msv31690v1 vcc org vss vcc org vss vcc org vss not connected x16 organization x16 organization x8 organization
docid4997 rev 15 11/33 m9 3c86 -x m9 3c76 -r m93 c 6 6 - x m93 c 5 6 - x m93 c 46- x i nst r uc tions 32 5 instructions the instruction set of the m93cx6 devices cont ains seven instructions , as summarized in table 4 to table 6 . each instructio n consists of the following parts, as shown in figure 5: read, write, wen, wds sequences : ? each instr u ction is pr eced ed by a r i sin g e d g e on chip select inpu t (s) with serial clock (c) b e in g held lo w . ? a st art bit, which is the firs t ?1? read on se ria l da t a in pu t ( d ) d u r i ng the r i sing ed ge o f se ria l clo ck (c ). ? t w o op -cod e bit s , r e a d on ser i al dat a inp u t (d) du rin g th e risin g edg e of seria l clo c k (c) . (som e in str u ctio ns also use the first two bit s o f th e a ddr ess to d e fine th e o p - c o de) . ? t h e a d d r e s s b i t s o f th e byt e or wo rd t h at is to be accessed. for th e m93 c 4 6 , th e ad dr ess is m ade up of 6 bit s fo r the x16 o r g anization or 7 b i t s for the x8 o r g anization (se e ta b l e 4 ). f o r th e m 9 3 c 5 6 an d m 9 3 c 6 6 , th e ad d r e ss is m a de u p of 8 bit s fo r th e x16 or ga nization o r 9 bit s for the x8 or ga nization ( s ee t able 5 ). for th e m93 c 7 6 an d m9 3c86, the ad dr ess is mad e u p o f 10 bit s for th e x1 6 o r ga nization or 1 1 b i t s for th e x8 organization (see table 6 ). the m93cx6 devices are fabricated in cmos technology and are therefore able to run as slow as 0 hz (static input signals) or as fast as the maximum ratings specified in ?ac characteristics? tables, in section 10: dc and ac parameters . t a b l e 4 . in st ruc t io n se t fo r t h e m 9 3c 46 instr u ctio n d esc rip t ion st a r t bi t op - co de x8 o r ig ination (org = 0) x16 o r ig inatio n (org = 1) addres s (1) dat a re q u ir e d clock cy cles a d d r ess (1 ) da t a re q u ir e d clo c k cy cles read rea d dat a from memory 1 1 0 a6-a0 q7-q0 - a5-a0 q 15-q0 - wr it e wr i t e da ta t o memory 1 0 1 a 6-a0 d7-d0 1 8 a 5-a0 d 15-d0 25 wen w rite enable 1 00 1 1 x xxxx - 1 0 1 1 xxxx - 9 wd s w rite d isabl e 1 00 00 x x xxx - 1 0 0 0 xxxx - 9 erase erase byte o r wo r d 1 1 1 a 6-a0 - 1 0 a 5-a0 - 9 eral erase all memory 1 0 0 10 x x xxx - 1 0 1 0 xxxx - 9 wr al w r ite al l me mo ry ? with same dat a 10 0 01 x x xxx d7-d0 1 8 0 1 xxxx d15-d0 25 1. x = don ' t care bit.
instructions m93c86-x m93c76-r m93c66-x m93c56-x M93C46-X 12/33 docid4997 rev 15 t a ble 5. ins t ru ct io n s e t f o r t h e m93 c 56 an d m93 c 6 6 instr u ction d escr ip tio n st a r t bi t op - cod e x8 o r igina t io n (org = 0) x1 6 o r igin atio n (org = 1) ad dr ess (1 ) (2) dat a require d cloc k c ycles a d d r ess (1 ) (3 ) da t a require d cloc k c ycles read read dat a from memory 1 1 0 a 8-a0 q7- q0 -a 7 - a 0 q15- q0 - write w rite dat a to memory 1 0 1 a 8-a0 d7 - d0 2 0 a7-a0 d 15-d0 27 wen w rite en able 1 00 1 1xxx xxxx -1 2 1 1 xx xxxx -1 1 wds w rite d i sabl e 1 00 0 0xxx xxxx -1 2 00xx xxxx -1 1 erase erase byte or w o rd 1 1 1 a 8-a0 - 1 2 a 7-a0 - 1 1 eral erase all memory 1 0 0 1 0xxx xxxx -1 2 10xx xxxx -1 1 wral w r ite al l me mo ry with same dat a 10 0 0 1xxx xxxx d7 - d0 20 01xx xxxx d 15-d0 27 1. x = don't car e bit. 2. addre s s bit a8 is not decoded by the m93c56. 3. addre s s bit a7 is not decoded by the m93c56. t a ble 6. ins t ru ct io n s e t f o r t h e m93 c 76 an d m93 c 8 6 instruction description st a r t bi t op - co de x8 ori g in atio n (o rg = 0) x16 orig in ati o n (o rg = 1) addre s s (1)( 2) dat a required clock cy cles ad dr ess (1 ) (3) dat a require d cloc k c ycles read rea d dat a from memory 1 1 0 a 10-a0 q7-q0 - a9-a0 q 15-q0 - wri t e wr i t e da ta t o memory 1 0 1 a 10-a0 d7-d0 2 2 a 9-a0 d15 - d0 29 wen w rite en able 1 00 1 1 x xxxx xxxx -1 4 1 1 xxxx xxxx -1 3 wds w rite di sabl e 1 00 00x xxxx xxxx -1 4 00 x xxx xxxx -1 3 erase erase byte or w o rd 1 1 1 a 10-a0 - 1 4 a 9-a0 - 1 3 eral erase all memory 1 0 0 10x xxxx xxxx -1 4 10 x xxx xxxx -1 3 wral w r ite al l me mo ry ? with same dat a 10 0 01x xxxx xxxx d7-d0 2 2 01 x xxx xxxx d15 - d0 29 1. x = don't care bit. 2. addre s s bit a10 is not de coded by the m93c76. 3. addre s s bit a9 is not decoded b y the m93c76.
docid4997 rev 15 13/33 m9 3c86 -x m9 3c76 -r m93 c 6 6 - x m93 c 5 6 - x m93 c 46- x i nst r uc tions 32 5.1 read data from memory the read data from memory (read) instruction outputs data on serial data output (q). when the instruction is receiv ed, the op-code and address are decoded, and the data from the memory is transferre d to an output shift register. a du mmy 0 bit is output first, followed by the 8-bit byte or 16-bit wo rd, with the most significant bit first. output data changes are triggered by the rising edge of serial clock (c). the m93cx6 automatically increments the internal address register and clocks out the next byte (or word) as long as the chip select input (s) is held high. in th is case, the dummy 0 bit is not output between bytes (or words) and a continuous stream of data can be read (the address counter automatically rolls over to 00h when the highest address is reached). 5.2 erase and w r ite dat a 5.2.1 write enable and write disable the write enable (wen) instruction enables the future execution of erase or write instructions, and the write disable (wds) inst ruction disables it. when power is first applied, the m93cx6 initializes it self so that erase and write instructions are disabled. after a write enable (wen) instruction has been exec uted, erasing and writing remains enabled until a write disable (wds) instruction is executed, or until v cc falls below the power-on reset threshold voltage. to protect the memory contents from accidental corruption, it is advisable to issue the write disable (wds) in struction after every write cycle. the read data from memory (read) instruction is not af fected by the write enable (wen) or write disable (wds) instructions. 5.2.2 write fo r th e w r ite da t a to me mor y (writ e ) instru ctio n , 8 or 16 d a t a bit s follo w t h e op -c od e an d a ddr ess b i t s . th ese fo rm the b y te o r word th at is to be written. as with th e othe r bit s , se rial data input (d) is sampled on the rising edge of serial clock (c). after the last data bit has been sampled, the chip select input (s) must be taken low before the next rising edge of serial clock (c). if chip select input (s) is brought low before or after this specific time frame, the self-timed programming cycle will not be started, and the addressed location will not be programmed. the completion of the cycle can be detected by monitoring the ready/ busy line, as described la ter in this document. once the write cycle has been started, it is inte rnally self-timed (the ex ternal clock signal on serial clock (c) may be stopped or left running after the start of a write cycle). the write cycle is automatically preceded by an erase cycle, so it is unnecessary to execute an explicit erase instruction before a writ e data to memory (write) instruction.
instructions m93c86-x m93c76-r m93c66-x m93c56-x M93C46-X 14/33 docid4997 rev 15 figure 5 . read, write, wen, wds s e que nce s 1. for the meanings of an, xn, qn and dn, see table 4 , table 5 and table 6 . ai00878d 1 1 0 an a0 qn q0 data out d s q read s w rite addr op code 1 0an a0 data in d q op code dn d0 1 busy ready s w rite enable 1 0xnx0 d op code 1 01 s w rite disable 1 0xnx0 d op code 0 0 0 check st a tus addr
docid4997 rev 15 15/33 m9 3c86 -x m9 3c76 -r m93 c 6 6 - x m93 c 5 6 - x m93 c 46- x i nst r uc tions 32 5.2.3 write all as with the er ase all m e mo ry (eral) in stru ct io n, th e fo rma t o f the w r ite all memory with sam e da t a (wral) in str u ctio n re qu ire s that a du mmy a d d r ess be pr ovide d . as with the w r it e da t a to m e m o ry (wr i t e ) inst ru ctio n , t h e format of the w r ite all memory with s a me da t a (wr a l) in str u c t io n r e qu ire s t h a t an 8 - b i t da t a by te , o r 16 -b it d a t a wo rd , b e pr ov ide d . this v a lue is written to all the addresses of the memory device. the co m p letion of the cycle can be detected by monitoring the ready/ busy line, as described next. f i g u re 6. wral se que nce 1. for the meanings of xn and dn, please see table 4 , table 5 and table 6 . ai00880c s write all data in d q addr op code dn d0 busy ready check st a tus 1 0 0 0 1 xn x0
instructions m93c86-x m93c76-r m93c66-x m93c56-x M93C46-X 16/33 docid4997 rev 15 5.2.4 erase byte or word the erase byte or word (erase) instruction sets the bits of the addressed memory byte (or word) to 1. once the address has been correctly decoded, the falling edge of the chip select input (s) starts the self-timed eras e cycle. the completion of the cycle can be detected by monitoring the ready/ busy line, as described in section 6: ready/busy status . figure 7. erase, eral se que nce s 1. fo r the mean ings of an and x n , please see t able 4 , table 5 and t able 6 . 5.2.5 erase all the erase all memory (eral) instruction erases the whole memory (all memory bits are set to 1). the format of the instruction requires that a dummy address be provided. the erase cycle is conducted in the same way as the erase instructi on (erase). the completion of the cycle can be detected by monitoring the ready/ busy line, as described in section 6: ready/busy status . ai00879b s erase 1 1 d q addr op code 1 busy ready check st a tus s erase all 1 0 d q op code 1 busy ready check st a tus 0 0 an a0 xn x0 addr
docid4997 rev 15 17/33 m9 3c86 -x m9 3c76 -r m93 c 6 6 - x m93 c 5 6 - x m93 c 46- x r eady/busy s t a t us 32 6 ready/busy status while the write or erase cycle is underw ay, for a write, eras e, wral or eral instruction, the busy signal (q=0) is returned whenever chip select inpu t (s) is driven high. (please note, though, that there is an initial delay, of t slsh , before this status information becomes available). in this state, the m93cx6 ignores any data on the bus. when the write cycle is completed, and chip select input (s) is driven high, the ready signal (q=1) indicates that the m93cx6 is re ady to receive the next instruction. serial data output (q) remains set to 1 until the chip select input (s) is brought low or until a new start bit is decoded. 7 initial delivery state the device is delivered with all bits in the me mory array set to 1 (each byte contains ffh).
clock pulse counter m93c86-x m93c76-r m93c66-x m93c56-x M93C46-X 18/33 docid4997 rev 15 8 clock pulse counter in a noisy environment, the number of pulses received on serial clock (c) may be greater than the number delivered by the master (the microcontroller). this can lead to a misalignment of the instruction of one or more bits (as shown in figure 8 ) and may lead to the writing of erroneous data at an erroneous address. to avoid this problem, the m93cx6 has an on-chip counter that counts the clock pulses from the start bit until the falling edge of the chip se lect input (s). if the number of clock pulses received is not the number expected, the write, erase, er al or wral instruction is aborted, and the contents of the memory are not modified. the number of clock cycles expected for ea ch instruction, and for each member of the m93cx6 family, are summarized in table 4: instruction set for the m93c46 to table 6: instruction set for the m93c76 and m93c86 . for example, a write data to memory (write) ins t ru ct ion o n th e m9 3 c 56 ( o r m 9 3c 66 ) exp e c t s 2 0 clock cycle s ( f o r th e x8 or gan ization) from the start bit to the falling edge of chip select input (s). that is: 1 s t ar t b i t + 2 op -c od e bit s + 9 ad dr ess bit s + 8 dat a bit s figure 8. write sequence with one clock glitch ai01395 s an-1 c d write st ar t d0 "1" "0" an glitch an-2 address and da t a are shifted by one bit
docid4997 rev 15 19/33 m9 3c86 -x m9 3c76 -r m93 c 6 6 - x m93 c 5 6 - x m93 c 46- x m ax imum ra tings 32 9 maximum ratings stressing the device outside the ratings liste d in the absolute maximum ratings table may cause permanent damage to the device. these are stress ratings only, and operation of the device at these, or any other conditions outside those indicat ed in the operating sections of this specification, is not im plied. exposure to absolute maximum rating conditions for extended periods may af fect device reliability. t a ble 7. absolute maximum ratings sy mbol pa rame te r m in. m a x . u nit ambien t op erating tempera t u r e ?40 1 3 0 c t st g s t o r a ge temperature ?65 1 5 0 c t lead lea d te mp erature duri ng sold ering pdip - 2 60 (1 ) 1. t l ead max must not be ap plied for more than 10 s. c o t he r p a ckages see n o te (2) 2. comp liant with jedec st anda rd j-std- 020d ( for smal l-bod y , sn- p b o r pb asse mbly) , the st ecop ack? 7191 395 specification, and the europea n dir ective on restr i ction s on h aza rdous subst ances ( r ohs directive 20 1 1/65/eu of july 201 1). v ou t ou tp ut ran ge (q = v oh o r hi -z ) ? 0.50 v cc +0 .5 v v in input range ? 0 .50 v cc +1 v v cc supp ly vo lt a g e ? 0.50 6.5 v v esd electrost a ti c d i scharge vo lt age (hu m a n bod y mode l) (3) 3. positive and negative pu lses ap plied on pin p a ir s, according to the aec-q100- 002 (compliant w i th jedec s t d jes d 22-a1 14, c1 = 100 pf , r1 = 150 0 ? , r2 = 500 ? ). - 4000 v
dc and ac parameters m93c86-x m93c76-r m93c66-x m93c56-x M93C46-X 20/33 docid4997 rev 15 10 dc and ac parameters this section summarizes the operating and measurement conditions, and the dc and ac characteristics of the device. t a b l e 8 . opera t ing co ndition s (m9 3cx6 -w) sy mbol pa rame ter m in. m a x . u nit v cc su ppl y volt ag e 2 .5 5.5 v t a ambi ent opera t i ng te mp erature ?40 85 c t a ble 9. ope r at ing cond it ions ( m 93 cx 6- r) sy mbol pa rame ter m in. m a x . u nit v cc su ppl y volt ag e 1 .8 5.5 v t a ambi ent opera t i ng te mp erature ?40 85 c t a bl e 10 . cyc l i n g pe rfo rma nc e (1) 1. cycling perf ormance for product s ide n tified by process letter k. sym b o l pa rame te r t est co nd ition s min . ma x. un it ncycle w rite c ycle endur a nce ta ? 25 c , v cc (m in) < v cc < v cc (max) - 4 ,000 ,0 00 w r ite cycle t a = 85 c, v cc (m in) < v cc < v cc (max) - 1 ,200 ,0 00 t a ble 1 1 . memory cell dat a retention (1 ) 1. fo r produ ct s id entified by process letter k. t he dat a re tention b ehavior is checked in pr oduction , w hile the 200- year limit is defined fr om cha r ac teriza tion a nd qualifica t ion r e sult s. para meter t est co nd ition s min. unit dat a rete ntion t a = 55 c 20 0 y ea r
docid4997 rev 15 21/33 m9 3c86 -x m9 3c76 -r m93 c 6 6 - x m93 c 5 6 - x m93 c 46- x d c an d ac par a met e rs 32 figure 9. ac t e s t ing input out put wave fo rms t a ble 12. ac mea s ure m ent c ondit i o n s symbol para meter m in. m a x . u nit c l load ca p a cit ance 100 pf - i np ut rise a nd fa ll times - 50 ns - i np ut vo lt a ge leve ls 0.2 v cc to 0.8 v cc v - i np ut timin g re fe re nce volt age s 0 .3 v cc to 0.7 v cc v - o utpu t timing referen c e vo lt a ges 0.3 v cc to 0.7 v cc v t a ble 13. input a nd out put cap a c it anc e sy mbol para meter t est condition (1 ) 1. sample d only , no t 100% te sted, at t a = 25 c and a frequency of 1 mhz. min m ax unit c out output c a p a cit a nc e v out = 0v - 8 pf c in inpu t cap a cit a nce v in = 0v - 6 p f ms19788v3 0.8v cc 0.2v cc 0.7v cc 0.3v cc input and output timing reference levels input voltage levels m93cxx
dc and ac parameters m93c86-x m93c76-r m93c66-x m93c56-x M93C46-X 22/33 docid4997 rev 15 t a ble 14 . dc c h ara c t e rist ics ( m 93 cx 6- w , dev i c e gra d e 6) sy mbol pa rame te r t e s t c o n d i t io n ( i n ad di tio n to th e con d i t i o n s defi ne d in ta b l e 8 an d ta b l e 1 2 ) min. max. unit i li input lea k a ge current 0v ? v in ? v cc - 2 . 5 a i lo ou tp ut le akag e cu rre n t 0 v ? v out ? v cc , q in hi-z - 2 .5 a i cc op erating sup p ly current v cc = 5 v , s = v ih , f = 2 mhz, q = ope n -2 m a v cc = 2.5 v , s = v ih , f = 2 mhz, q = ope n -1 m a i cc 1 s t an dby supp ly cu rre n t v cc = 2.5 v , s = v ss , c = v ss , org = v ss or v cc , pi n7 = v cc , v ss or h i -z -2 (1 ) 1. 5 a fo r pre v ious devices i dentified with the pr ocess lette r g . a v cc = 5.5 v , s = v ss , c = v ss , org = v ss or v cc , pi n 7 = vc c, v ss or hi-z -3 (2 ) 2. t ested only for curr ent devices id e n tified with the p r ocess letter k. a v il input low volt ag e (d , c, s) - ? 0.45 0.2 v cc v v ih input hig h vo lt a ge (d, c, s) - 0 .7 v cc v cc + 1 v v ol ou tp ut lo w vo lt age (q) v cc = 5 v , i ol = 2. 1 ma - 0 .4 v v cc = 2.5 v , i ol = 10 0 a - 0 .2 v v oh ou tp ut h i gh volt ag e (q) v cc = 5 v , i oh = ?4 00 a 0.8 v cc - v v cc = 2.5 v , i oh = ? 100 a v cc ?0.2 - v t a ble 15 . dc c h ara c t e rist ics ( m 93 cx 6- r) s y mb ol pa ra me ter t e s t c o n d i t io n mi n. ma x. unit i li in put l eakag e current 0v ? v in ? v cc - 2 . 5 a i lo o u tp ut l e a ka g e cu rre nt 0v ? v out ? v cc , q in hi-z - 2.5 a i cc ope r ating sup p ly current v cc = 5 v , s = v ih , f = 2 mhz, q = ope n -2 m a v cc = 1. 8 v , s = v ih , f = 1 m h z , q = ope n -1 m a i cc 1 s t an dby suppl y curren t v cc = 1.8 v , s = v ss , c = v ss , org = v ss or v cc , p i n7 = v cc , v ss or hi - z -1 (1) 1 . 2 a f o r pr evious devices i dentified with process letter g . a v il in put l o w volt age (d, c, s) - ? 0.45 0 . 2 v cc v v ih in put h i gh vol t ag e (d, c, s) - 0 .8 v cc v cc + 1 v v ol outpu t lo w vo lt a ge (q) v cc = 1.8 v , i ol = 10 0 a - 0 .2 v v oh outpu t hi gh volt age (q) v cc = 1.8 v , i oh = ? 100 a v cc ?0.2 - v
docid4997 rev 15 23/33 m9 3c86 -x m9 3c76 -r m93 c 6 6 - x m93 c 5 6 - x m93 c 46- x d c an d ac par a met e rs 32 t a ble 16 . ac cha r ac te ris t ics ( m 93 cx6- w , m9 3cx6- r (1 ) , de vice gra d e 6) 1. a ll m93cx6-r d evices op erate with a clock fre quency of 1 m hz, a s def ined in t ab l e 17 . only the new m93cx6-r de vice s ( i dent ified with the pr oce s s le tter k) can op erate w i th the 2 mhz timing value s def ined in this t able. t est co nd ition s sp ecifie d in ta b l e 8 an d t a bl e 12 symbol a l t. para meter m in. m ax. unit f c f sk c lock freq uen cy d.c. 2 m hz t sl ch c h ip sel e ct lo w to clock hi gh 5 0 - n s t sh ch t cs s chip select setup time 50 - n s t sl sh (2 ) 2. chip select input ( s ) must be br ought low for a min i mum of t slsh betwee n con s ecutive instructio n cycles. t cs c h ip sel e ct lo w to chi p se lect h i gh 200 - n s t ch cl (3) 3. t chc l + t clch t 1 / f c . t skh c l ock high time 200 - n s t cl ch (3) t skl c l ock low time 200 - n s t dv c h t dis d a t a i n se tu p time 5 0 - n s t ch dx t dih da t a in h o l d ti me 50 - n s t cl s h t sks c l ock se tu p ti me (rel a ti ve to s) 5 0 - n s t cl s l t cs h ch i p se le ct h o l d t i m e 0 - n s t sh qv t sv ch i p se le ct to ready/busy st a t us - 200 ns t slqz t df c h ip sel e ct lo w to outpu t hi-z - 100 ns t ch q l t pd0 d e lay to output low - 200 ns t ch qv t pd1 d e lay to output va lid - 200 ns t w t wp eras e or w rite cycle time - 5 ms
dc and ac parameters m93c86-x m93c76-r m93c66-x m93c56-x M93C46-X 24/33 docid4997 rev 15 t a bl e 17 . a c c h ara c t e ri st ic s (m 93 cx 6 - r) (1) 1. th e new m93c x6- r devices ide ntified with the p r ocess letter k can oper ate with a clo c k frequ ency of 2 mhz and a n erase (or w r ite) cycle of 5 ms, as shown in t able 16 . t est co nd ition s sp ecifie d in ta b l e 9 an d t a bl e 12 symbol alt. pa rame te r m in. m ax. unit f c f sk cl ock frequ ency d .c. 1 mhz t slc h ch ip sele ct low to clock hig h 250 - n s t shc h t cs s ch ip sele ct setup ti me 5 0 - n s t slsh (2) 2. chip select i nput (s) must b e brough t low for a minimum of t slsh be tween consecutive instr u ction cycles. t cs ch ip sele ct low to chip sel e ct hi gh 250 - n s t ch cl (3 ) 3. t chcl + t clch t 1 / f c . t sk h cl ock h i gh time 250 - n s t cl ch (3 ) t skl cl ock l ow ti me 250 - ns t dvc h t dis dat a in setup time 100 - n s t ch dx t dih da t a in h o ld time 100 - n s t cl sh t sks clock setup time (relative to s) 100 - n s t cl sl t csh ch ip sele ct hol d time 0 - ns t shqv t sv chip selec t to ready/busy st atus - 4 00 ns t sl q z t df ch ip sele ct low to output hi-z - 2 0 0 n s t ch ql t pd0 de lay to o u tput l o w - 4 0 0 n s t ch qv t pd1 de lay to o u tput va lid - 4 00 ns t w t wp erase or write cycle time - 10 ms
docid4997 rev 15 25/33 m9 3c86 -x m9 3c76 -r m93 c 6 6 - x m93 c 5 6 - x m93 c 46- x d c an d ac par a met e rs 32 figure 10. sync hrono us timing (s t a rt a nd op- code inp u t) figur e 1 1 . sync hron ous t i ming ( r e a d) figure 12. synchronous timing (write) ai01428 c op code op code start s d op code input st ar t tdvch tshch tclsh tchcl tclch tchdx ai00820c c d q address input hi-z tdvch tclsl a0 s data output tchqv tchdx tchql an tslsh tslqz q15/q7 q0 ai01429 c d q address/data input hi-z tdvch tslch a0/d0 s write cycle tslsh tchdx an tclsl tslqz busy tshqv tw ready
package mechanical data m93c86-x m93c76-r m93c66-x m93c56-x M93C46-X 26/33 docid4997 rev 15 11 package mechanical data in or de r to mee t en vi ron m en t a l re qu ire m en t s , st o f fe rs th ese devices in dif f ere n t gr ade s of ecop ack? p a cka ges, d e p end ing on the i r le vel of envir onm ent a l com p lian c e. ecop ack? spec ifications , grade definitions a nd pr od uct st atus ar e availa ble a t : w w w . s t.c om . ecopack? is an st trademark . figure 1 3 . pdip8 ? 8 lead pla s tic du al in - l ine p a ck age , 30 0 mils bo dy wid t h , p a c k a g e out line 1. dr awin g is not to scale . t a b l e 1 8 . pdip8 ? 8 lead p l a s t i c d u al in- l in e p ack age , 30 0 mils bo dy wid t h , p a c kage me cha nical dat a symbol mill imeters i nches (1) 1. v alu es in inche s ar e conver ted fr om mm and ro unded to 4 d ecimal digit s . t y p. min. max. t y p. min. max. a - - 5 .33 - - 0 .2 098 a1 - 0 .38 - - 0 .015 - a2 3. 3 2 .9 2 4 .9 5 0 .1 29 9 0 . 1 1 5 0. 19 4 9 b 0 .46 0 .36 0 .56 0 .0 18 1 0 . 0 14 2 0 .0 22 b2 1.52 1.14 1.78 0.05 98 0 . 04 49 0 . 0 701 c 0 .25 0 .2 0.36 0.00 98 0 . 00 79 0 . 0 142 d 9 .27 9 .02 1 0.16 0.365 0 . 35 51 0 . 4 e 7 .87 7 .62 8 .26 0 .3098 0 .3 0. 3252 e1 6.35 6.1 7 .1 1 0 .2 5 0 .240 2 0 .2 799 e 2 .54 - - 0 .1 - - ea 7.62 - - 0.3 - - eb - - 1 0 .92 - - 0 .4 299 l 3 .3 2.92 3.81 0.12 99 0 . 1 1 5 0 .15 pdip-b a2 a1 a l be d e1 8 1 c ea b2 eb e
docid4997 rev 15 27/33 m9 3c86 -x m9 3c76 -r m93 c 6 6 - x m93 c 5 6 - x m93 c 46- x p ac ka ge mec h anica l da ta 32 f i g u r e 14 . s o 8 n a rro w ? 8 le ad p l a s t ic small o u tline, 15 0 mils bod y wid t h, p a c k a g e out line 1. drawin g is not to scale . t a ble 19. so8 na rrow ? 8 le ad plas tic sma l l out line , 15 0 mils bo dy wid t h , p a c kag e dat a sy mbol millimeters i nc hes (1 ) 1. v a lues in inches a r e converted fr om mm and r ounded to 4 decimal dig i t s . t y p m in max t yp min m ax a - - 1 .75 - - 0 .0689 a1 - 0 .1 0 . 2 5 - 0 .0039 0 . 0 098 a2 - 1 .2 5 - - 0 .0492 - b - 0. 28 0. 48 - 0 .0 1 1 0. 01 8 9 c - 0 . 1 7 0 . 2 3 - 0 .0067 0 . 0 091 ccc - - 0.1 - - 0 .0 039 d 4 .9 4.8 5 0.192 9 0 .18 9 0 . 1 969 e 6 5.8 6 .2 0.236 2 0 .2283 0 . 2 441 e1 3 . 9 3 .8 4 0 .153 5 0 .1496 0 . 1 575 e 1 .27 - - 0 .05 - - h - 0 . 2 5 0.5 - 0.0098 0 . 0 197 k- 0 8 - 0 8 l - 0.4 1 .2 7 - 0.0157 0.05 l 1 1.04 - - 0.040 9 - - so-a e1 8 ccc b e a d c 1 e h x 45 a2 k 0.25 mm l l1 a1 gauge plane
package mechanical data m93c86-x m93c76-r m93c66-x m93c56-x M93C46-X 28/33 docid4997 rev 15 figure 1 5 . uf dfpn8 8 - lead ultr a thin fi ne pit c h dual flat pac k a g e no le ad 2 x 3 mm, ou tline 1. dr awin g is not to scale . 2. th e central pad (are a e2 by d2 in the abo ve illustra tion) is p u lled, inter nally, to v ss . it must not be allow ed to be connected to any o t her volt age or signal line on the pc b , for example during the soldering pr ocess. 3. the circle in the top view of the package indicates the position of pin 1. t a b l e 2 0 . u f d f p n 8 8- le ad u l t r a t h i n f i ne p i t c h dual flat pa cka ge no le ad x 3 mm, da t a symbol millimeters i nc hes (1 ) 1. v a lues in inches a r e converted fr om mm and r ounded to f our decimal digit s . t y p m in max t yp min m ax a 0 .55 0 0.450 0.600 0.021 7 0 .0177 0 . 0 236 a1 0.02 0 0 .000 0.050 0.000 8 0 .0000 0 . 0 020 b 0 .25 0 0.200 0.300 0.009 8 0 .0079 0.01 1 8 d 2 .00 0 1.900 2.100 0.078 7 0 .0748 0 . 0 827 d2 (rev mc ) - 1.200 1.600 - 0 .0472 0 . 0 630 e 3 .00 0 2.900 3.100 0 . 1 1 81 0.1 1 42 0 . 1 220 e2 (rev mc) - 1.200 1.600 - 0 .0472 0 . 0 630 e 0 .50 0 - - 0.019 7 - - k (rev mc) - 0.300 - - 0.01 18 - l - 0.300 0.500 - 0 .01 1 8 0 .0 197 l 1 - - 0.150 - - 0 . 0 059 l 3 - 0 .300 - - 0.01 18 - eee (2) 2. applied f o r exposed die p addle and ter m ina l s. exclude embedding p a rt of exposed die p addle fr om measuring. - 0 .080 - - 0.0031 - d e zw_meev2 a a1 eee l1 e b d2 l e2 l3 pin 1 k mc
docid4997 rev 15 29/33 m9 3c86 -x m9 3c76 -r m93 c 6 6 - x m93 c 5 6 - x m93 c 46- x p ac ka ge mec h anica l da ta 32 figure 1 6 . t s sop8 ? 8 lead t h in shri nk small outline, p a ckage outline 1. dr awin g is not to scale . t a ble 21 . tssop8 ? 8 - lea d thin sh rin k small outline, p ack age me cha n ical dat a symbol millim e ters inche s (1) 1. v a lues in inches ar e conve r ted fr om mm and r ounded to fo ur decima l digit s . t y p m in max t yp min m ax a - - 1 .200 - - 0.047 2 a1 - 0 .050 0.150 - 0 .002 0 0 .005 9 a2 1.000 0.800 1.050 0. 0394 0 .031 5 0 .041 3 b - 0.190 0.300 - 0 .007 5 0 .0 1 1 8 c - 0.090 0.200 - 0 .003 5 0 .007 9 cp - - 0.100 - - 0.003 9 d 3 .000 2.900 3.100 0.1 181 0 . 1 142 0.122 0 e 0 .650 - - 0.025 6 - - e 6 .400 6.200 6.600 0. 2520 0 .244 1 0 .259 8 e1 4.400 4.300 4.500 0. 1732 0 .169 3 0 .177 2 l 0 .600 0.450 0.750 0. 0236 0 .017 7 0 .029 5 l1 1.000 - - 0.039 4 - - ? -0 8 - 0 8 n8 8 tssop8am 1 8 cp c l e e1 d a2 a a e b 4 5 a1 l1
part numbering m93c86-x m93c76-r m93c66-x m93c56-x M93C46-X 30/33 docid4997 rev 15 12 part numbering fo r a list of a v a ilab l e op tio n s (spe ed, p a cka ge, etc.) or for fu rthe r infor m a t io n on a n y aspe ct of this device, please contact your nearest st sales office. t a ble 22. ord e ring info rmat i o n sche m e exampl e: m93 c 86 ? w mn 6 t p de vice typ e m93 = microwire ser i al eeprom de vice fun c tion 8 6 = 16 kbit (2 048 x 8) 7 6 = 8 kb it (10 24 x 8 ) 66 = 4 k b i t (5 12 x 8 ) 56 = 2 k b i t (2 56 x 8 ) 46 = 1 k b i t (1 28 x 8 ) op eratin g vo lt ag e w = v cc = 2.5 to 5.5 v r = v cc = 1.8 to 5 . 5 v pac kag e bn = pdip8 mn = so8 (1 50 mils wid th) mc = ufdfpn8 2 x 3 m m (mlp8) dw = tssop8 (16 9 mi ls wid th) de vice gr ade 6 = ind u stria l te mp erature rang e, ?4 0 to 8 5 c . ? de vice te sted w ith st and ard te st flow packing b l ank = st a nda rd p a cking t = t a p e and ree l p a cking pla t in g te ch no logy p or g = ecop ack ? (rohs compliant)
docid4997 rev 15 31/33 m9 3c86 -x m9 3c76 -r m93 c 6 6 - x m93 c 5 6 - x m93 c 46- x r e v ision hist ory 32 13 revision history t a ble 23 . docu ment r evision his t ory da te revision ch an ges 01 -ap r-2010 9 mod i fied footnote in ta b l e 1 4 and t a b l e 15 on p age 23 up dated f igure 1 4 : uf df pn 8 (mlp8 ) 8-l ead ul tra thin fine p itch d ual flat p a ckag e no lea d 2 x 3 mm, outlin e and t abl e 22: u f df pn8 (ml p 8) 8 - l ead ul tra thin fine p i tch d ual flat p a ckag e n o lead 2 x 3 mm, dat a 29 -ap r-2010 1 0 up dated f i gure 3 1 : a va ilab l e m93c6 6 -x p r oduct s (p a ckage, volt age ran ge, te mp erature grad e) ufdfpn o p tion. 12-apr-20 1 1 1 1 up dated t able 7: absolute m a ximum ratings , mlp8 p a cka ge da t a in sectio n 1 2 : pa cka ge mechan ical da t a an d process dat a in section 9: clock pulse counter . de leted t abl e 29: a vaila ble m93c 46-x produ ct s (p ackage , volt ag e ran ge, te mp erature grad e) , t abl e 3 0 : a v a ila ble m93c 56-x produ ct s (p a cka ge, vo lt age ran ge, tempe r atu r e grade ) , t a b l e 31 : a vai l a bl e m93c 66-x prod uct s (p ackag e , vol t ag e ra nge, temperature gra de) , t a b l e 32: a vail able m93 c 76-x prod uct s (p ackag e , vol t ag e ra nge , tempe r a t u r e g r ade) an d t a ble 33 : a vai labl e m9 3c86 -x pro duct s (p a cka ge, vo lt age ran ge, tempe r atu r e grade ) . 05-oct-20 1 1 1 2 up dated t able 1: device summ ary an d t a ble 8: op erating con d ition s (m93cx6) . mod i fied footnote 2 in t abl e 7 . 23 -ap r-2013 1 3 do cument re fo rma t ted. up dated: ? p art n u mber names ? t abl e 1: de vi ce su mma r y an d p a ckage figu re on cover p age ? section 1 : descriptio n ? i ntro ductory p a rag r a ph in section 9: maximum r a tings ? n ote (2) un der t a ble 7: absolute maxim u m ratings ? t abl e 8: operatin g co nditio n s (m93 cx6) and t abl e 8: operatin g cond itions (m93cx6 -w ) ? i ntro ductory p a rag r a ph in section 1 1 : packag e me chani cal dat a ? f igure 15 : ufdfpn8 8 - lead ul tra thin f ine p itch du al fl at packa ge no le ad 2 x 3 mm, ou tl ine an d t a ble 20 : ufdfpn8 8 - l ead ul tra thin f i ne pi tch dua l fla t packag e n o lead 2 x 3 mm, dat a ? t abl e 22: orderi ng information sche m e re named : ? f i gure 2: 8-pin p a ckage con nection s (top view) ? t abl e 16: ac cha r a cte ri stics (m93cx6, devi c e g r ade 6) de leted: ? s ection : common i/o opera t io n ? t able: dc cha r acte risti cs (m93cx6 , de vi ce grade 3), t able : dc chara cteri stics (m93cx6-w , device g r a de 3), a nd t abl e: ac chara cteri stics (m93cx6-w , device g r a de 3)
revision history m93c86-x m93c76-r m93c66-x m93c56-x M93C46-X 32/33 docid4997 rev 15 26 -oct-2013 1 4 up dated: ? t abl e 1: de vi ce su mma r y : adde d ?m9 3 c46 - r? an d ?m9 3 c86 - r?, de leted m93cxx p a rt numbe rs. ? f eatures : single supply volt age, write cycles and dat a retention ? section 1 : descriptio n ? n ote (2) un der t a ble 7: absolute maxim u m ratings . ? section 10: dc and a c p a rameters : up dated the introdu cti on and de leted t able s rel a ted to m93 c xx p a rt numb e rs. ? f i gure 9: ac testing i npu t outpu t wave forms ? t abl e 14: d c ch aracte risti cs (m93c x6 -w , device g r a de 6) , t a b l e 15 : dc chara c teri stics (m9 3 cx6-r) , t a ble 16 : ac characteristics (m93cx6 -w , m9 3cx6-r, device gra de 6) and t abl e 17: ac characteristics (m93cx6-r) . ? t abl e 22: orderi ng information sche m e . add ed: ? f i gure 4: m93cx6 org in put co nnection ? t abl e 10: c y cl ing pe rforman ce a nd t abl e 1 1 : memory cell da t a retentio n . 1 5 -nov-20 1 3 1 5 r e m o ved t abl e 14 cyclin g p e rforma nce by byte t a ble 23. docume nt re vision hist ory ( c ont inued ) da te revision ch an ges
docid4997 rev 15 33/33 m9 3c86 -x m9 3c76 -r m93 c 6 6 - x m93 c 5 6 - x m93 c 46- x 33 ? pl ea se r e ad c a re fu lly : in f or m at i on i n t hi s d oc umen t i s p r o v i de d so l el y i n co nn ec ti on wi th st pr od uc ts . s t mi cr oe le ct ro ni cs nv an d i t s su bsi d ia ri e s (? s t ?) re ser v e th e ri gh t t o ma ke ch an ges , co rr ecti o ns, mo di f i c at i on s o r i m p r o vem ent s , t o t hi s d oc ume nt , and t he pr od ucts a nd ser vi c es de scr i be d h e r ei n at any t i me, with ou t no tic e . al l st pr odu ct s a r e s o l d pu rs ua nt to s t ? s t e r m s an d co nd it i o n s of sal e . pur c h a s e r s a r e so le l y r e s pon si bl e fo r t h e c hoi c e , se le ct i o n an d us e o f th e s t pr od uc ts an d s e r v i c e s d e s c r i b e d he re in , and st as sume s n o li a b i l i t y wh at so ev er r e l a t i ng t o t h e cho i ce, se le ct i o n o r u s e o f t h e s t pr odu ct s a nd s e r v i c e s de sc ri be d he re in . no l i c e n se , e x p r e s s o r i m pl i e d , b y e s t o p pel or ot he rw is e, t o an y i n t e l l e c t u a l pr op er ty ri gh t s i s gr an te d u nde r t h i s doc ume n t . i f an y pa rt of t h i s do cume nt re f er s t o an y t hi r d pa rt y p r o duc t s or se rv ic es i t sh al l n ot be d ee m ed a li ce ns e gr an t b y st fo r t he use of su ch t hi r d par ty pr od uc ts or ser vi c es, or an y in t el l e ct ua l p r o pe r t y c ont a i n ed t he r e i n or con si de r e d as a war r ant y c ov er i n g t he u se i n a ny ma nn er w hat s oev er o f su ch th i r d p a r t y pr od uct s o r se rv i c es or a n y i n t e ll e c t u a l pr op er t y co nt ai ne d ther ei n . unle ss o t her w ise se t for t h in s t ?s t e rms and co nditions o f sa le s t disc laims an y ex pres s or imp l ied warrant y wit h r espe ct to th e use and/or sa le of st p r oduct s in cluding withou t limit a tion imp l ied warrant ie s of merch antab il it y, fitne ss f o r a parti cul ar p urpos e ( and t heir e q uivale nts under the laws of any j urisdiction) , o r inf r in gement o f any pat e nt, copy right or oth e r in tel l ect ual pro pert y rig h t. st pro ducts are no t d esigne d or aut horize d f o r u se in : (a) safe ty critical app l ications s uch as life supp orting, ac tive impl anted device s or s yst ems wi th p roduct func tional safe ty re quiremen ts; (b ) aero nautic appl ica t ions; ( c ) aut omotive app l ications or environme nts , and/or (d) ae rosp ace appl ica t ions or environme n ts . where st pro ducts are no t de signed for su ch us e, t h e p urcha ser shal l u se produ c ts at purc haser ?s s o le risk , ev en if st h as bee n inf o rmed in writing of s uch usa g e, unle ss a pro duct is exp ress ly des i g nated by s t as being inten ded for ? automo t ive, automot ive saf e ty or med i ca l? indust ry domains a ccording to st prod uct de sign sp ecifications . produc ts f ormall y es cc, qml or jan qualified are deem ed suitabl e for us e in ae rospa ce by the c o rres p onding gov ernme n tal ag ency. res al e of st pr od uct s wi t h pr ov is io ns d i f f er en t f r o m t he s t at eme nt s an d/ or t ec hn i c al fe at ur es s et f o rt h i n th is d oc ume nt s ha l l i mme di at el y v o i d a n y w a r ra n ty gr an te d b y s t f o r t h e st pr od u c t o r s e r v ic e d e s c rib ed he re in an d s h a ll n o t c re a t e o r ex te nd in a n y ma nn er w h at so ev er, a n y l i ab il ity of st. st a nd t he s t lo go a r e tr ad ema r k s or re gi st er ed t r ad emar ks of s t i n va ri ou s co un tr i es. in f o r m at i on i n t h i s do cu men t su pe rs ed es a nd r e p l a c e s al l i n fo rma t i o n pr ev io us ly s u p p l i e d . th e st l o g o is a re gi ste re d tr ad ema rk o f s t micr oe le ct ro ni cs . a ll ot he r n a m es a re th e pr op er ty of th ei r r e s p e c tiv e ow n e r s . ? 20 13 st mi cr oel e c t r o n i c s - al l r i g h t s r e s e r v e d s t mi cr oe le ctr o n i c s gr ou p of co mp an ie s aus t r al i a - b el gi um - b r a zi l - can ad a - ch in a - cz ech rep ub l i c - f i nl an d - fr an ce - ger m an y - ho ng k ong - i ndi a - is ra el - i t a l y - ja pa n - m a l a y si a - ma lt a - morocco - p h i l i p pi nes - si ngapor e - sp ai n - s w eden - swi t zer l and - un it ed kingd om - u n i t e d st at e s of amer i ca www.s t.co m

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